发表论文
[2024年]
- STOP: Spatiotemporal Orthogonal Propagation for Weight-Threshold-Leakage Synergistic Training of Deep Spiking Neural Networks
Haoran Gao, Xichuan Zhou, Yingcheng Lin, Min Tian, Liyuan Liu, Cong Shi*. Preprint at https://arxiv.org/abs/2411.11082 (2024) - MorphBungee-Lite: An Edge Neuromorphic Architecture With Balanced Cross-Core Workloads Based on Layer-Wise Event-Batch Learning/Inference
Zhengqing Zhong, Haibing Wang, Mingju Chen, Yingcheng Lin, Min Tian, Tengxiao Wang, Liyuan Liu, Cong Shi*. IEEE Transactions On Circuits and Systems II: Express Briefs, 2024, 72(1), 293 – 297（SCI, 2区） - A Visual Cortex-Inspired Edge Neuromorphic Hardware Architecture With On-Chip Multi-Layer STDP Learning
Junxian He, Min Tian, Ying Jiang, Haibing Wang, Tengxiao Wang, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Ying Wang, Cong Shi*. Computers and Electrical Engineering, 2024, 120:109806（SCI, 1区） - LLD-GAN: An End-to-End Network for Low-Light Image Demosaicking
Li Wang, Cong Shi*, Shrinivas Pundlik, Xu Yang, Liyuan Liu, Gang Luo. Displays, 2024, 85:102856. （SCI，1区） - NeuroCam: A Neuromorphic Intelligent CameraSystem for Face Recognition
Jialin Yang, Haibing Wang*, Zhengging Zhong, Mingju Chen, Ying Jiang, Cong Shi. 2024 4th International Conference on Intelligent Technology and Embedded Systems (ICITES), September 20-23, 2024, Chengdu, China. - MorphBungee: A 65-nm 7.2-mm2 27-μJ/image Digital Edge Neuromorphic Chip with On-Chip 802-frame/s Multi-Layer Spiking Neural Network Learning
Tengxiao Wang, Min Tian, Haibing Wang, Zhengqing Zhong, Junxian He, Fang Tang, Xichuan Zhou, Yingcheng Lin, Shuang-Ming Yu, Liyuan Liu, Cong Shi*. IEEE Transactions on Biomedical Circuits and Systems, 2024, doi: 10.1109/TBCAS.2024.3412908 . (Early Access)（SCI，1区） - Ghost Reservoir: A Memory-Efficient Low-Power and Real-Time Neuromorphic Processor of Liquid State Machine with On-Chip Learning
Cong Shi, Xiang Fu, Haibing Wang, Yingcheng Lin, Ying Jiang, Liyuan Liu, Nanjian Wu, Min Tian*. IEEE Transactions on Circuits and Systems II: Express Briefs: 2024, 71(10), 4526-4530.（SCI，2区） - A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips
Siyuan Wei, Ke Ning, Lei Kang, Xueming Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi, Nanjian Wu, Liyuan Liu. IEEE Transactions on Circuits and Systems I: Regular Papers: 2024, 71(2), 740-753.（SCI，1区）
[2023年] - NORP: A Compact Neuromorphic Olfactory Recognition Processor with On-Chip Hybrid Learning
Cong Shi, Yuxuan Wang, Fengchun Tian, Xiang Fu, Haibing Wang, Jingya Zhang, Haoran Gao, Shukai Duan, Lidan Wang, Min Tian*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), 2023, 31-32. - An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips
Leyi Chen, Cong Shi, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Min Tian*. IEEE Transactions on Circuits and Systems I: Regular Papers: 2023, 70(11), 4249-4259.（SCI，1区） - MorphBungee: A 65nm 7.2mm2 27μJ/image Digital Edge Neuromorphic Chip with On-Chip 802 frame/s Multi-layer Spiking Neural Network Learning
Tengxiao Wang, Min Tian, Zhengqing Zhong, Haibing Wang, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Nanjian Wu, Liyuan Liu, Cong Shi*, 2023 IEEE Asian Solid-State Circuits Conference (ASSCC), 2023, 1-3. - Live Demonstration: Face Recognition at The Edge Using Fast On-Chip Deep Learning Neuromorphic Chip
Zhengqing Zhong, Tengxiao Wang, Haibing Wang, Zhihua Zhou, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*. 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2023, 1-2. - A 24.3μJ/Image SNN Accelerator for DVS-Gesture with WS-LOS Dataflow and Sparse Methods
Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi, Jian Liu, Nanjian Wu, Liyuan Liu*. IEEE Transactions on Circuits and Systems II: Express Briefs: 2023, 70(11), 4226-4230.（SCI，2区） - Network Pruning for Bit-Serial Accelerators
Xiandong Zhao, Ying Wang*, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: 2023, 42(5), 1597-1609.（SCI，2区） - Low-Cost Real-Time VLSI System for High-Accuracy Optical Flow Estimation Using Biological Motion Features and Random Forests
Cong Shi, Junxian He, Shrinivas Pundlik, Xichuan Zhou*, Nanjian Wu, Gang Luo. Science China Information Sciences: 2023, 66(5), 159401.（SCI，2区）（PDF下载） - An Edge Neuromorphic Hardware with Fast On-Chip Error-Triggered Learning on Compressive Sensed Spikes
Cong Shi, Jingya Zhang, Tengxiao Wang, Zhengqing Zhong, Junxian He, Haoran Gao, Jianyi Yu, Ping Li, Min Tian*. IEEE Transactions on Circuits and Systems II: Express Briefs: 2023, 70(7), 2665-2669.（SCI，2区） - A Configurable On-Chip Spike Encoding Network Based on Dual-Mode Integrate & Fire Neurons
Zhengqing Zhong, Yunpeng Tuo*, Haibing Wang, Tengxiao Wang, Junxian He, Min Tian, Cong Shi. IEEE 6th Information Technology, Networking, Electronic and Automation Control Conference(ITNEC): 2023, 1445-1449.
[2022年] - 面向边缘应用的脉冲视觉传感器
章宦慧, 康磊, 田娜, 杨旭,冯鹏, 石匆, 刘剑, 吴南健, 刘力源*. 微纳电子与智能制造: 2022, 4(4), 62-70. - 物端神经形态类脑芯片设计综述
钟正青, 王腾霄, 刘力源, 吴南健, 田敏, 石匆*. 微纳电子与智能制造: 2022, 4(3), 19-30. - An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips
Leyi Chen, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Cong Shi, Min Tian*. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS): 2022, 1-5.(Best Paper Award) - TEDOP: a Tiny Event-Driven Neural Network Hardware Core Enabling On-Chip Spike-Driven Synaptic Plasticity
Cong Shi, Sihao Chen, Haibing Wang, Zhengqing Zhong, Ping Li, Junxian He, Tengxiao Wang, Jianyi Yu, Min Tian*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA): 2022, 62-63. - MorphBungee: An Edge Neuromorphic Chip for High-Accuracy On-Chip Learning of Multiple-Layer Spiking Neural Networks
Tengxiao Wang, Haibing Wang, Junxian He, Zhengqing Zhong, Fang Tang, Xichuan Zhou, Shuang-Ming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*. IEEE Biomedical Circuits and Systems Conference (BioCAS): 2022, 255-259. - TripleBrain: A Compact Neuromorphic Hardware Core with Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity
Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*. IEEE Transactions on Biomedical Circuits and Systems: 2022, 16(4), 636-650.（SCI，2区） - A Novel SiC MOSFET With a Fully Depleted P-Base MOS-Channel Diode for Enhanced Third Quadrant Performance
Ping Li, Rongyao Ma, Jingyu Shen, Liang Jing, Jingwei Guo, Zhi Lin, Shengdong Hu*, Cong Shi, Fang Tang. IEEE Transactions on Electron Devices: 2022, 69(8), 4438-4443.（SCI，2区） - A Lightweight Spiking GAN Model for Memristor-Centric Silicon Circuit with On-Chip Reinforcement Adversarial Learning
Min Tian, Jing Lu*, Haoran Gao, Haibing Wang, Jianyi Yu, Cong Shi. IEEE International Symposium on Circuits & Systems (ISCAS): 2022, 3388-3392. - A Low-cost FPGA Implementation of Spiking Extreme Learning Machine With On-chip Reward-Modulated STDP Learning
Zhen He, Cong Shi*, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo. IEEE Transactions on Circuits and Systems II: Express Briefs: 2022, 69(3), 1657-1661.（SCI，2区）
[2021年] - TripleBrain: An Edge Neuromorphic Architecture for High-accuracy Single-layer Spiking Neural Network with On-chip Self-organizing and Reinforcement Learning
Haibing Wang, Zhen He, Jinsong Rao, Tengxiao Wang, Junxian He, Min Tian, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Cong Shi*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA): 2021, 88-89. - A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors
Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA): 2021, 51-52. - DeepTempo: a Hardware-Friendly Direct Feedback Alignment Multi-Layer Tempotron Learning Rule for Deep Spiking Neural Networks
Cong Shi*, Tengxiao Wang, Junxian He, Jianghao Zhang, Liyuan Liu, Nanjian Wu. IEEE Transactions on Circuits and Systems II: Express Briefs: 2021, 68(5), 1581-1585. （SCI，2区，invited paper） - An Edge 3D CNN Accelerator for Low Power Activity Recognition
Ying Wang, Yongchen Wang, Long Cheng, Cong Shi, Huawei Li*, Xiaowei Li. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: 2021, 40(5), 918-930. （SCI，2区） - Hapke Data Augmentation for Deep Learning Based Hyperspectral Data Analysis with Limited Samples
Kai Qin, Fangyuan Ge, Yingjun Zhao, Ling Zhu, Ming Li, Cong Shi, Dong Li, Xichuang Zhou*. IEEE Geoscience and Remote Sensing Letters: 2021, 18(5), 886-890.（SCI，2区） - Exploiting Memristors for Neuromorphic Reinforcement Learning
Cong Shi, Jing Lu, Ying Wang, Ping Li, Min Tian*. IEEE International Conference on Artificial Intelligence Circuits & Systems (AICAS): 2021, 1-4. - A Low-cost High-speed Object Tracking VLSI System Based on Unified Textural and Dynamic Compressive Features
Wei He, Jie Zhang, Yingcheng Lin, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi*. IEEE Transactions on Circuits and Systems II: Express Briefs: 2021, 68(3), 1013-1017.（SCI，2区） - A Novel Approach to Inactivate the Body p-i-n Diode of SiC MOSFET by Using the Normally-off JFET
Ping Li, Jingwei Guo, Zhi Lin, Shengdong Hu, Cong Shi, Fang Tang*. IEEE Transactions on Electron Devices: 2021, 68(4), 1784-1790.（SCI，2区） - A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition
Xichuan Zhou, Zhenghua Zhou, Zhengqing Zhong, Jianyi Yu, Tengxiao Wang, Min Tian, Ying Jiang, Cong Shi*. IEEE International Symposium on Circuits & Systems (ISCAS): 2021, 1-5. - Optimizing Information Theory Based Bitwise Bottlenecks for Efficient Mixed-Precision Activation Quantization Xichuan Zhou*, Kui Liu, Cong Shi, Haijun Liu, Ji Liu. AAAI Conference on Artificial Intelligence (AAAI): 35(4), 3590-3598, 2021.
- CompSNN: A Lightweight Spiking Neural Network Based on Spatiotemporally Compressive Spike Features
Tengxiao Wang, Cong Shi*, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo. Neurocomputing: 2021, 425(15), 96-106. （SCI，2区）
[2020年] - BitPruner: Network Pruning for Bit-serial Accelerators
Xiandong Zhao, Ying Wang*, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang. ACM/IEEE Design Automation Conference (DAC): 2020, No. 47, 1-6. - A High-speed Low-cost CNN Inference Accelerator for Depthwise Separable Convolution
Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Ying Jiang, Liyuan Liu, Nanjian Wu, Cong Shi*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA): 2020, 63-64. - Without low spatial frequencies, high resolution vision would be detrimental to motion perception
Cong Shi*, Shrinivas Pundlik, Gang Luo*. Journal of Vision: 2020, 20(8), 29. （SCI，3区） - MoNet3D: Towards Accurate Monocular 3D Object Localization in Real Time
Xichuan Zhou*, Yicong Peng, Chunqiao Long, Fengbo Ren, Cong Shi. International Conference on Machine Learning (ICML): no. 119,11503-11512, 2020. - A Low Reverse Recovery Charge Superjunction MOSFET with P-base and N-pillar Schottky Contacts
Ping Li*, Zhi Lin, Shengdong Hu, Cong Shi, Fang Tang. IEEE Transactions on Electron Devices: 2020, 67(4), 1693-1698. （SCI，2区）
[2019年] - A Hardware System for Fast AER Object Classification with On-chip Online Learning
Jinguo Huang, Wei He, Xichuan Zhou, Junxian He, Ying Wang, Cong Shi, Yingcheng Lin*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA): 2019, 85-86. - High-speed Classification of AER Data Based on a Low-cost Hardware System
Jinguo Huang, Yingcheng Lin, Wei He, Xichuan Zhou, Cong Shi*, Nanjian Wu, Gang Luo. IEEE International Conference on ASIC (ASICON): 2019, 1-4. - 20,000-fps Visual Motion Magnification on Pixel-parallel Vision Chip
Junxian He, Xichuan Zhou, Yingcheng Lin, Chonglei Sun, Cong Shi*, Nanjian Wu, Gang Luo. IEEE International Conference on ASIC (ASICON): 2019, 1-4. - 基于仿生运动能量特征的光流计算芯片设计综述
何俊贤, 黄进国, 石匆*. 微纳电子与智能制造: 2019, 1(3), 141-150. - Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis
Yongchen Wang, Ying Wang, Huawei Li, Cong Shi, Xiaowei Li*. IEEE/ACM Design Automation Confernece (DAC): 2019, No. 210, 1-6.
[2018年] - A Streaming Motion Magnification Core for Smart Image Sensors
Cong Shi*, Gang Luo. IEEE Transactions on Circuits and Systems II: Express Briefs: 2018, 65(9), 1229-1233. （SCI，2区） - Comparison of computerized system and human observers for vision assessment based on optomotor response in Rhodopsin knockout mice
Kin-Sang Cho, Jiaxin Xiao, Cong Shi, Karen Chang, Tor Paaske Utheim, Gang Luo, Dong Feng Chen*. Investigative Ophthalmology & Visual Science: 2018, 59(9), 982. （SCI，2区） - A Compact VLSI System for Bio-Inspired Visual Motion Estimation
Cong Shi, Gang Luo*. IEEE Transactions on Circuits and Systems for Video Technology: 2018, 28(4), 1021-1036. （SCI，1区） - Optimization of Optomotor Response-based Visual Function Assessment in Mice
Cong Shi*, Xuedong Yuan, Karen Chang, Kin-Sang Cho, Xinmin Simon Xie, Dong Feng Chen, Gang Luo. Scientific Reports: 2018, 8(1), 9708. (SCI，3区)
[2017年以前] - 66‐2: Comparison of Flat and Curved Monitors: Eyestrain Caused by Intensive Visual Search Task
Gang Luo*, Ying Chen, Amy Doherty, Rui Liu, Cong Shi, Shuhang Wang, Hoai Le, Eli Peli. SID Symposium Digest of Technical Papers: 2016, 47(1), 903-906 - High speed vision processor with reconfigurable processing element array based on full-custom distributed memory
Zhe Chen, Jie Yang, Cong Shi, Qi Qin, Liyuan Liu, Nanjian Wu*. Japanese Journal of Applied Physics: 2016, 55(4S), 04EF08. （SCI，4区） - A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor
Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi, Runjian Dou, Qi Qin, Jian Liu, Nanjian Wu*. Science China Information Sciences: 2015, 58(4), 1-10. （SCI，2区） - Pixel-parallel feature detection on vision chip
Jie Yang, Cong Shi, Liyuan Liu, Jian Liu, Nanjian Wu*. Electronics Letters: 2014, 50(24), 1839-1841. （SCI，4区） - A massively parallel keypoint detection and description (MP-KDD) algorithm for high-speed vision chip
Cong Shi, Jie Yang, Liyuan Liu, Nanjian Wu*, Zhihua Wang. Science China Information Sciences: 2014, 57(10), 1-12. （SCI，2区） - A reconfigurable 256 × 256 image sensor controller that is compatible for depth measurement
Zhe Chen, Shan Di, Cong Shi, Liyuan Liu, Nanjian Wu*. Chinese Journal of Semiconductors: 2014,35(10), 105007-6. - A 1000 fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array processor and self-organizing map neural network
Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-Jian Wu*, Zhihua Wang. IEEE Journal of Solid-State Circuits: 2014, 49(9), 2067-2082. （SCI，1区） - A compact PE memory for vision chip
Cong Shi, Zhe Chen, Jie Yang, Nanjian Wu*, Zhihua Wang. Chinese Journal of Semiconductors: 2014, 35(9), 095002-7. - A high speed multi-level-parallel array processor for vision chips
Cong Shi, Jie Yang, Nanjian Wu*, Zhihua Wang. Science China Information Sciences: 2014, 57(6), 1-12. （SCI，2区） - A high speed 1000 fps CMOS image sensor with low noise global shutter pixels
Yangfan Zhou, Zhongxiang Cao, Qi Qin, Quanliang Li, Cong Shi, Nanjian Wu*. Science China Information Sciences: 2014, 57(4), 1-8. （SCI，2区） - Heterogeneous vision chip and a LBP based algorithm for high-speed tracking
Jie Yang, Cong Shi, Liyuan Liu, Nanjian Wu*. Electronics Letters: 2014, 50(6),438-439. （SCI，4区） - 7.3 A1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network
Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-Jian Wu*, Zhihua Wang. IEEE International Solid-State Circuits Conference (ISSCC): 2014, 128-129. - A novel architecture of local memory for programmable SIMD vision chip
Zhe Chen, Jie Yang, Cong Shi, Nanjian Wu*. IEEE International Conference on ASIC (ASICON): 2013, 1-4. - A programmable computational image sensor for high-speed vision
Jie Yang, Cong Shi, Xitian Long, Nanjian Wu*. International Symposium on Photoelectronic Detectionand Imaging (ISPDI): 2013, 89081T-6. - A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors
Ye Han, Quanliang Li, Cong Shi, Nanjian Wu*. Chinese Journal of Semiconductors: 2013, 34(8), 085016-6. - A Programmable High Speed Vision System with Superscalar PE and Its Parallel Computing Language
Jie Yang, Cong Shi, Xitian Long, Nanjian Wu*. Open Journal of Applied Sciences: 2013, 3(1B), 65-67. - A low-power column-parallel ADC for high-speed CMOS image sensor
Ye Han, Quanliang Li, Cong Shi, Liyuan Liu, Nanjian Wu*. International Symposium on Photoelectronic Detection and Imaging (ISPDI): 2013, 89082E-7. - 一种基于多级并行处理器的高速实时手势识别及指尖轨迹追踪系统
龙希田, 石匆, 杨杰, 吴南健*. 微电子学与计算机: 2013, 30(12), 90-96. - A high-speed CMOS image sensor with column-parallel single capacitor CDSs and single-slope ADCs
Quanliang Li, Cong Shi, Nanjian Wu*. International Symposium on Photoelectronic Detection and Imaging (ISPDI): 2011,819433-6. - A high-speed vision processor based on pixel-parallel PE array and its applications
Cong Shi, Nanjian Wu*, Zhihua Wang. IEEE Youth Conference on Information Computing and Telecommunications (YC-ICT): 2010, 57-60. - DSTN sleep transistor sizing with a new approach to estimate the maximum instantaneous current
Yu Sun, Liyi Xiao*, Cong Shi. IEEE International Symposium on Circuits and Systems (ISCAS): 2010, 3717-3720. - 功率门控技术中的分簇算法和控制电路
张利地, 肖立伊*, 石匆. 微处理机: 2009, 30(5), 31-34.
发明专利
- 网络结构可配置的类脑芯片架构.
石匆*, 王腾霄, 田敏, 王海冰, 钟正青, 何俊贤, 蒋颖. 中国，公开号：CN117273100A，2023-12-22 - 脑仿生片上学习脉冲神经网络及边缘端神经形态处理器.
石匆*, 田敏, 何俊贤, 王腾霄, 王海冰, 喻剑依, 高灏然, 张靖雅, 陈乐毅, 陈思豪, 庹云鹏. 中国，公开号：CN116663620A, 2023-08-29 - 事件驱动类型芯片中突触权重更新方法、芯片、电子设备.
石匆*, 王海冰, 田敏, 何俊贤, 王腾霄, 喻剑依, 高灏然, 张靖雅, 陈乐毅, 陈思豪, 庹云鹏. 中国，公开号：CN116629331A，2023-08-22 - 基于Ca-LIF神经元模型的Spike-BP片上学习方法、系统及处理器.
石匆*, 高灏然, 田敏, 何俊贤, 王腾霄, 喻剑依, 王海冰, 陈思豪, 张靖雅, 庹云鹏, 陈乐毅. 中国，公开号：CN116629344A，2023-08-22 - 基于全脉冲HMAX模型的多层卷积类脑芯片.
石匆*, 何俊贤, 王海冰, 王腾霄, 张靖雅, 高灏然. 中国，公开号：CN116562350A，2023-08-08 - 一种基于液体状态机的脉冲神经网络架构.
石匆*, 陈乐毅, 田敏, 何俊贤, 王腾霄, 王海冰, 喻剑依, 高灏然. 中国，公开号：CN116562354A，2023-08-08 - 深层脉冲神经网络模型及深层SNN片上实时学习处理器.
石匆*，张靖雅, 田敏, 王腾霄, 何俊贤, 喻剑依, 高灏然, 王海冰, 陈乐毅, 陈思豪, 庹云鹏. 中国，公开号：CN116562344A，2023-08-08 - 基于双模式积分点火神经元的片上脉冲编码器.
石匆*, 庹云鹏, 钟正青, 田敏, 王海冰, 王腾霄, 何俊贤, 陈乐毅, 张靖雅, 王丽, 陈思豪, 高灏然. 中国，公开号：CN116050487A，2023-05-02 - 轻量级片上学习FPGA硬件架构及其设计方法.
石匆*, 张靖雅, 田敏, 王腾霄, 王海冰, 何俊贤, 卢靖, 高灏然. 中国，公开号：CN115115039A，2022-09-27 - 一种低光照小像素CFA采样与边缘计算设备适用的去马赛克方法.
石匆*, 任静, 李睿, 王海冰, 高灏然, 何俊贤, 王腾霄, 王丽. 中国，公开号：CN115082315A，2022-09-20 - 存内计算装置及其控制方法.
石匆*, 陈乐毅, 田敏, 王海冰, 喻剑依, 何俊贤. 中国，公开号：CN115064197A，2022-09-16 - 基于简化SDSP算法的轻量级片上学习方法、系统及处理器.
陈思豪, 石匆*, 田敏, 何俊贤, 王腾霄, 王海冰, 高灏然, 庹云鹏. 中国，公开号：CN115018058A，2022-09-06 - 基于忆阻器的可片上强化学习脉冲GAN模型及设计方法.
石匆*, 卢靖, 田敏, 王海冰, 喻剑依, 何俊贤, 王腾霄, 高灏然. 中国，公开号：CN114943329A，2022-08-25 - 一种基于异构脉冲神经网络的人脸识别的FPGA芯片
周政华, 石匆*, 钟正青, 王海冰, 周喜川. 中国，公开号：CN114708639A，2022-07-05 - 基于脉冲神经网络的轻量级片上学习方法、系统及处理器.
王海冰, 石匆*, 田敏, 王腾霄, 何俊贤, 何祯. 中国，公开号：CN114091663A，2022-2-25 - 基于脉冲神经网络的实时深度学习方法、系统及处理器.
王腾霄, 石匆*, 田敏, 何俊贤, 王海冰, 喻剑依. 中国，公开号：CN114065922A，2022-2-18 - 基于时间步的二值脉冲图的脉冲卷积神经网络硬件加速器. （已授权）
张玲, 杨晶, 石匆*, 林英撑, 何伟, 李睿. 中国，公开号：CN113033795A，2021-6-25 - 基于深度可分离卷积的轻量级神经网络硬件加速器. （已授权）
林英撑, 李睿, 石匆*, 何伟, 张玲, 杨晶. 中国，公开号：CN113033794A，2021-6-25 - Assessing Visual Function.
Dong Feng Chen, Gang Luo*, Cong Shi, Kin-Sang Cho. 美国，US 17/044,606，2020-10-1 - Dynamically reconstructable multistage parallel single instruction multiple data array processing system.
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